| 摘要 |
PURPOSE: To attain impedance conversion at high frequency by using parallel distributed amplifiers for obtaining a large impedance matching ratio between input and output loads. CONSTITUTION: An impedance conversion circuit or amplifier 50 has a series of FETs 52, 54, forming a cascode pair connected to a single input transmission line 56 using a 50Ω-terminating resistor. In order to attain the desired 3:1 impedance reduction, three cascode pairs 50 are arrayed in parallel in each set, i.e., three active elements or transistor amplifiers are connected to an input transmission line 56 between respective line inductors. The output FETs 541m , 542m , 543m of the cascode pairs are connected to three output transmission lines 58 and terminated by the 50Ωresistor. In the parallel connection state of the three output lines 58, characteristic output impedance becomes 50/3(17)Ωoutput impedance.
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