发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
摘要 <p>PURPOSE:To improve the connection reliability of a solder bump, by arranging dummy patterns in the region positioned almost below the solder bump in the residual region of a wiring layer below the uppermost layer wiring. CONSTITUTION:In the residual region of the same wiring layer as third layer Al wirings 7a-7d, dummy patterns 8 are arranged at specified intervals in the region below a solder bump 2. The patterns are constituted of the same material as, e.g. the third layer Al wirings 7a-7d, and have the same line width. As a result, the wiring density in the region where the dummy patterns 8 are formed becomes high, so that the surface of an interlayer insulating film formed on the patterns 8 is flattened. That is, step-difference is not generated in a substratum of the uppermost wiring layer of the region positioned nearly below the solder bump 2, so that a flat electrode pad can be formed. Thereby connection reliability of the solder bump 2 can be improved.</p>
申请公布号 JPH0338043(A) 申请公布日期 1991.02.19
申请号 JP19890173727 申请日期 1989.07.05
申请人 HITACHI LTD 发明人 OWADA NOBUO;OOGAYA KAORU;KOBAYASHI TORU;KAWAJI MOTONORI
分类号 H01L21/3205;H01L21/321;H01L21/60;H01L21/82;H01L23/52 主分类号 H01L21/3205
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