| 摘要 |
<p>PURPOSE:To reduce the variation of a reading margin against the dispersion of a thereshold voltage by regulating the input bias level of an amplifier by a threshold voltage compensating MOS transistor(TR) controlled by a voltage equal to a dummy threshold voltage. CONSTITUTION:The semiconductor memory is provided with a bit line Nb connected to a memory cell, an amplifier INV for detecting current flowing into the bit line Nb and outputting voltage corresponding to the current, the threshold voltage compensating MOSTR Qp4 whose drain is connected to the input terminal of the amplifier INV, and a dummy cell Qdc connecting its drain to the gate electrode of the TR Qp4 and holding the ON state of the drain and gate by receiving constant potential. Thereby, the input side bias level of the amplifier INV can be changed in accordance with the threshold voltage of the dummy MOSTR Qdc. Consequently, the variation of the reading margin due to the dispersion of the threshold voltage of the MOSTR constituting the memory cell Qc can be reduced.</p> |
