Semiconductor integrated circuit with improved I/O structure.

摘要

A semiconductor integrated circuit includes a bias voltage generating circuit (43) and first- and second-level signal generating circuits. The bias voltage generating circuit (43) includes a bandgap reference circuit (59) for generating a first fixed voltage as a first bias voltage and a second fixed voltage. A second bias voltage is generated on the basis of the second fixed voltage. The second-level signal generating circuit receives a predetermined first-level signal and generates a predetermined second-level signal on the basis of the first and second bias voltages generated by the bias voltage generating circuit (43). The first-level signal generating circuit receives the predetermined second-level signal and generates the predetermined first-level signal on the basis of the first and second bias voltages generated by the bias voltage generating circuit (43).