发明名称 LOGARITHMIC COMPRESSION AMPLIFYING CIRCUIT
摘要 PURPOSE:To obtain a logarithmic compression characteristic stable against temperature change with small deviation by providing plural differential amplifier sections one of transistors(TRs) whose emitter is inserted with resistors different in resistance value with each other and summing collector currents flowing to the TRs. CONSTITUTION:Since the emitter of a TR Q11 has a resistor R1 and the emitter of a TR Q21 has no resistor, an offset is caused at the input stage. Assuming collector currents of the TRs Q11, Q12 respectively as Ic1, Ic1', when the currents Ic1, Ic1' are equal to each other, the voltage between input terminals T1 and T2 is an input offset voltage Voff. A current Io flowing through a load resistor Ro is the sum of collector currents Icj of the TRs Q1j and the logarithmic compression characteristic is approximated by polygonal lines. Since the logarithmic characteristic depends only on the resistor Rj and the constant current source 2j, the variance in the logarithmic compression is reduced.
申请公布号 JPH02265310(A) 申请公布日期 1990.10.30
申请号 JP19890087506 申请日期 1989.04.05
申请人 NEC CORP 发明人 KIMURA KATSUHARU
分类号 H03G11/08 主分类号 H03G11/08
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