| 摘要 |
A system for detecting and isolating fault conditions occurring within a digital electronic system. The digital electronic system includes a first digital logic array for generating digital outputs in response to a set of digital signal inputs applied to it. The digital logic array is replicated and the second array is configured to receive the same inputs as the first. The first and second arrays are made to operate in synchrony so as to normally produce identical outputs in the absence of fault conditions occurring either in the first or second array or in the inputs applied to them. The digital outputs from the first array are applied to first and second residue code generators having different modulii. Likewise, the outputs from the second arry are applied to third and fourth residue code generators which are identical in make-up to the first and second residue code generators. The residue codes developed by the first and third generators are applied to a first comparator while the codes developed by the second and fourth generators are applied to a second comparator. The comparator outputs are applied through combinatorial logic so as to provide an output signal indicative of a fault condition when either the first or second comparator produces an output indicative of inequality between respective residue codes.
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