发明名称 HIERARCHICAL ARITHMETIC SYSTEM
摘要 PURPOSE:To solve a conditional code conflict in its early stage and to improve a processing speed, by reading stored input data immediately, finding the conditional code of the arithmetic result of said data on the basis of the arithmetic result, and emplolying conditional branching instruction processing after a precedent instruction. CONSTITUTION:A pipeline type computer equipped with an operand buffer 20 for storing data until the starting of arithmetic execution by an arithmetic unit 14 has a precedent operating device 29 which performs arithmetic independently of the unit 14 and obtains the conditional code of the arithmetic result on the basis of the result. Then, when decoded information on an instruction to be executed and operand data are stored in the buffer 20 without referece to whether the unit 14 is occupied or not, data is read out of the buffer 20 immediately and inputted to the operating device 29 to perform airthmetic. Then, the conditional code of the result is found on the basis of the arithmetic result and this conditional code is used for the processing of conditional branching instructions succeeding to said instruction.
申请公布号 JPS5896345(A) 申请公布日期 1983.06.08
申请号 JP19810194001 申请日期 1981.12.02
申请人 HITACHI SEISAKUSHO KK 发明人 SHINTANI YOUICHI;WADA KENICHI;SHIMIZU TSUGUO;YAMAOKA AKIRA
分类号 G06F7/00;G06F9/38 主分类号 G06F7/00
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