| 摘要 |
<p>PURPOSE:To realize a sufficient random processing by allowing the period of an M series generating circuit to be its frame length or above the resetting the M series generating circuit at a period being a multiple of K of the frame length N. CONSTITUTION:An M series generating means 101 generates an M series at a period of (2<11>-1) bits and generates the M series at a period longer than the frame length N. Since the M series is generated at a period L of (2<11>-1=) 2047 bits from 11 stages of shift registers 102, each stage of the shift registers 102 is reset at a period of (40X52=) 2080 bits (frame length N is selected as 40 bits and K is selected as 52), the period is longer than the period L of the M series generation and the transmission data subjected to sufficient random processing is obtained. Thus, the number of times of resetting being a cause to insufficient random processing is reduced.</p> |
