发明名称 |
Semiconductor memory device having pseudo row decoder. |
摘要 |
<p>A semiconductor memory device includes: a memory cell array (1) including a plurality of word lines (WL); a row pre-decoding unit (2) responsive to a row address signal, outputting a plurality of row pre-decode signals with units of a group having signals of a number corresponding to a combination of each logic level of a predetermined plurality of bits of the row address signal; a row pre-decode wiring (3, 3L, 3R) for transmitting the plurality of row pre-decode signals; a row main decoder (4) responsive to one signal in each group of the plurality of row pre-decode signals, carrying out a main decoding for selecting one of the plurality of word lines; a pseudo row decoder (5) having substantially same electrical characteristics as said row main decoder, carrying out a simulation of said main decoding in response to said plurality of row pre-decode signals output on said row pre-decode wiring; and a word line driver (6) for driving a word line selected by the row main decoder to a predetermined level. An operation of the word line driver is started in response to an activation of the pseudo row decoder, thereby excluding a possibility of an erroneous selection of a word line and preventing an unnecessary prolongation of an access time.</p> |
申请公布号 |
EP0344632(A2) |
申请公布日期 |
1989.12.06 |
申请号 |
EP19890109502 |
申请日期 |
1989.05.26 |
申请人 |
FUJITSU LIMITED;FUJITSU VLSI LIMITED |
发明人 |
KODAMA, YUKINORI;FURUYAMA, TAKAAKI |
分类号 |
G11C8/10;G11C11/407;G11C8/08;G11C8/12;G11C8/18;H01L21/8242;H01L27/108 |
主分类号 |
G11C8/10 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|