发明名称 LOGIC CIRCUIT
摘要 <p>PURPOSE:To prevent hazard of the output against a change of a select input by constituting the circuit such that the selection of one of two input signals is started after an output level of a throughgate is changed with respect to the level of the select signal input in a prescribed direction. CONSTITUTION:A through-gate 21 retarding the select signal SELECT by a prescribed time and outputting it, and a NAND gate 22 outputting a NAND logic between the input signal to the through-gate 21 and its output signal, are provided, and the selection of one of two input signals is started after the output level of the through-gate 21 is changed with respect to a level change of the select signal select (especially a change of '0' '1') in a prescribed direction. Thus, the signal is not adequately in one and same level in the inside of the circuit and no hazard is caused in the output change.</p>
申请公布号 JPH01288009(A) 申请公布日期 1989.11.20
申请号 JP19880117639 申请日期 1988.05.13
申请人 FUJITSU LTD;KYUSHU FUJITSU ELECTRON:KK 发明人 YODA RYUICHI;NAKAMICHI HIROTO
分类号 H03K5/00;G06F1/06;H03K17/00;H03K17/16 主分类号 H03K5/00
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