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发明名称
METHOD FOR DESIGNING LAYOUT FOR SEMICONDUCTOR INTEGRATED CIRCUIT
摘要
申请公布号
JPH01286079(A)
申请公布日期
1989.11.17
申请号
JP19880116599
申请日期
1988.05.13
申请人
NEC CORP
发明人
NISHIGUCHI NOBUYUKI
分类号
H01L21/822;G06F17/50;H01L21/82;H01L27/04
主分类号
H01L21/822
代理机构
代理人
主权项
地址
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