发明名称 |
FLOATING POINT ARITHMETIC UNIT |
摘要 |
PURPOSE:To perform the division processing at a high speed by carrying out the comparison between the mantissa parts via a comparator to decide occurrence of the take-down independently of the division of the mantissa part and performing the process of an exponent part independently of the division of the mantissa part. CONSTITUTION:Both a dividend N and a divisor D are equal to the normalized floating point number data and are compared with each other by a comparator 102 to acquire the result Mn>Md. In such a case, the take-down is never produced in case the division is carried out at a mantissa part between both results Mn and Md. While the take-down is always produced in case of Mn<Md. Thus the presence or absence of the take-down is known based on the result of said comparison without waiting for the result obtained from a mantissa part divider. Then a subtractor 103 can calculate an exponent part Eq of the quotient Q with use of the exponent parts En and Ed as well as the comparison output received from the comparator 102. As a result, the parallel operations can be carried out between the exponent and mantissa parts and a high-speed division operation is attained. |
申请公布号 |
JPH01265326(A) |
申请公布日期 |
1989.10.23 |
申请号 |
JP19880094825 |
申请日期 |
1988.04.18 |
申请人 |
MATSUSHITA ELECTRIC IND CO LTD |
发明人 |
NAKAJIMA MASAICHI |
分类号 |
G06F7/537;G06F7/00;G06F7/483;G06F7/508;G06F7/52;G06F7/535;G06F7/76 |
主分类号 |
G06F7/537 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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