发明名称 SEMICONDUCTOR MEMORY
摘要 <p>PURPOSE:To perform the readout of a memory element at high speed by forming a precharge voltage set with high accuracy in the neighborhood of the operating point of a sense amplifier. CONSTITUTION:In a precharge circuit, a FETQ19 is turned on by the 'L' of a precharge signal, the inverse of PC, and inversion amplifier circuits (Q18 and Q19) which set the FET as a load are set at operating states. A voltage shifted by the threshold value of a Q20 from an intermediate voltage decided by a conductance ratio of the Q18 to the Q19 is transmitted to data lines D via switches (Q14-Q17) between a precharge line PL and the data lines, and precharges respective data line. When the data line D to which a selected memory cell is coupled is coupled with a common data line CD, the initial stage circuit PA of the sense amplifier SA is precharged in the neighborhood of the operating point of the sense amplifier, and a signal corresponding to the ON and OFF states of the memory cell is sent to the sense amplifier via the line D and the line CD, and since the amplifier outputs an amplifier signal immediately by a signal, the inverse of SC, the readout is performed at high speed.</p>
申请公布号 JPH01243294(A) 申请公布日期 1989.09.27
申请号 JP19880069431 申请日期 1988.03.25
申请人 HITACHI LTD 发明人 TANAKA CHIKASHI;OKADA JOJI
分类号 G11C17/00;G11C16/06 主分类号 G11C17/00
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