发明名称 Data reproducing circuit for memory system and having equalizer generating two different equalizing signals used for data reproduction.
摘要 <p>A data recording and reproducing circuit for a memory system, such as a magnetic disk memory system, and including a reflection type cosine equalizer (2) and a data reproducing circuit (4). The equalizer includes a first equalizing circuit (21a), having a first equalizing gain (k1), and outputting a first equalized signal, and a second equalizing circuit (21b) having a second equalizing gain (k2) smaller than the first equalizing gain, and outputting a second equalizing circuit. The data reproducing circuit includes a differentiator (40) for differentiating the first equalized signal, a window generating circuit (42) for generating a window signal (WS) from the second equalized signal, and a data separator (43) for discriminating the differentiated signal in response to the window signal to produce de pulsed reproductions signal (DT).</p>
申请公布号 EP0333592(A2) 申请公布日期 1989.09.20
申请号 EP19890400744 申请日期 1989.03.16
申请人 FUJITSU LIMITED 发明人 KANEGAE, MASAHIDE
分类号 G11B5/035;G11B20/10 主分类号 G11B5/035
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