| 摘要 |
PURPOSE: To attain high speed processing by outputting a carry storage adder tree circuit to a pipeline register and outputting the result via a 2nd adder circuit. CONSTITUTION: The circuit is provided with a carry storage adder tree circuit 10 having a 1st input circuit receiving digital data to be multiplied and having an output circuit, a pipeline register 16 having an input circuit and an output circuit, a means connecting the input circuit of the carry storage adder tree circuit 10 to the input circuit of the pipeline register 16, a 2nd adder circuit 19 having an input circuit and an output circuit, a means connecting the output circuit of the pipeline register 16 to the input circuit of the 2nd adder circuit 19, a data output terminal through which output data from the 2nd adder circuit 19 and a means connecting the output circuit of the 2nd adder to the data output terminal. Thus, a high processing speed is attained. |
