发明名称 FRAME SYNCHRONIZING SYSTEM
摘要 <p>PURPOSE:To accurately extract data by forcibly shifting a mode to a hunting mode when the number of the times of the repetition of the transition between a synchronous mode and a forward synchronization protecting state reaches a prescribed value or more. CONSTITUTION:A synchronization supervising circuit 13 samples a mode signal in a signal line 15 and stocks or counts H and L, and after this is executed for prescribed time, the patterns of H and L are completed. It is decided that a supervised synchronization is an erroneous synchronization when the number of L is large or when L and H are completely arranged alternately based on either the above-mentioned patterns or the counted values of L and H. Further, the supervised synchronization is not decided as the erroneous synchronization when H continues near the end of prescribed supervising time. In this manner, algorithm for decision is operated in various ways. Thus, the mode is shifted to the hunting mode when a hunting mode instructing signal is made into an L level and given through a signal line 16 to the frame synchronizing circuit 13 based on the decided result. Thus, accurate data can be obtained.</p>
申请公布号 JPH01229537(A) 申请公布日期 1989.09.13
申请号 JP19880054871 申请日期 1988.03.10
申请人 TOSHIBA CORP 发明人 TSURUTA HIDEKAZU
分类号 H04J3/06;H04L7/08 主分类号 H04J3/06
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