发明名称 Cache move-in bypass
摘要 Bypassing of data from a main storage unit to an instruction and operand processing unit around an intermediate storage unit improves performance in a data processing system. The instruction and operand processing unit supplies requests for operands to the intermediate storage unit or cache. If the line is missing from the cache, the request operand is retrieved from the main storage unit. A bypass data path is connected between the main storage unit, prior to error detecting means in the cache, and the instruction and operand processing unit for transferring requested operands to the instruction and operand processing unit directly. Control, coupled to receive requests for operands and to the instruction and operand processing unit, signals the instruction and operand processing unit to receive the requested operands from the bypass data path when the data includes a requested operand.
申请公布号 US4851993(A) 申请公布日期 1989.07.25
申请号 US19870041046 申请日期 1987.04.20
申请人 AMDAHL CORPORATION 发明人 CHEN, JACK;THOMAS, JEFFREY A.;PETOLINO, JR., JOSEPH A.;BEGLEY, MICHAEL J.;SHAH, AJAY;TAYLOR, MICHAEL D.;TOBIAS, RICHARD J.
分类号 G06F9/38;G06F12/08 主分类号 G06F9/38
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