| 摘要 |
PURPOSE: To prevent the increase of the number of instructions by making a processor include the condition evaluation logic which evaluates a condition set in an execution device only with a response to execution of selected one of plural instructions and giving the evaluated condition set as a result operand from the execution device. CONSTITUTION: A processor 10 consists of a controller 12 which communicates through an address bus 20, a control bus 22, and a data bus 24, a pair of execution devices 14a and 14b, a register set 16, and a memory 18. Plural conditions in execution devices 14a and 14b are evaluated only with a response to execution of selected one of plural instructions in execution devices 14a and 14b, and the evaluated condition set is given as the result operand. Thus, the number of instructions is not increased, and unnecessary decoding and control logic are eliminated. |
