发明名称 FAULT DETECTION CIRCUIT
摘要 PURPOSE:To reduce the adjustment man-hour by providing a feedback circuit controlling a gate voltage so that a difference between a reference voltage and a drain voltage reaches a prescribed value thereby detecting the voltage fluctuation between the gate and source of a field effect transistor(TR). CONSTITUTION:The constitution is adopted such that the emitter and collector of the TR are connected to the drain and base of the FET whose drain receives the 1st constant voltage VDD via a resistor R1, whose gate receives a 2nd constant voltage VGG via a resistor R4, and whose source receives a prescribed voltage respectively, and the voltage VDD and VGG of the TR are used to apply a bias voltage. Then the change in the drain-source voltage VDS of the FET 1 is fed back to the gate-source voltage VGS via a common base TR 2, then the voltage VGS is changed to compensate the change in the voltage VDS thereby making the voltage VDS automatically constant. Thus, the fluctuation in the DC characteristic of the FET 1 is detected by monitoring the change in the voltage VGS and since there is no moving part employed, the adjustment man- hour is saved.
申请公布号 JPH01160105(A) 申请公布日期 1989.06.23
申请号 JP19870319610 申请日期 1987.12.16
申请人 FUJITSU LTD 发明人 NAKANO YOSHIAKI;UEDA TOMIO;UNNO ISAMU
分类号 H03F3/193;H04B17/00 主分类号 H03F3/193
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