High speed RAM based data serializers

摘要

Multiple bit parallel data serializers are described for accessing data serially through a port at high video data rates. The serializer preferably comprises a buffer array for storing data at a plurality of SRAM memory locations, sense amplifiers for sensing the stored data, an address decoder for selecting a predetermined memory location of the buffer array for data access by the sense amplifiers, a data latch for the latched buffering of data prior to output to the serial port and a control gate for enabling the gated transfer of data between the sense amplifiers and the output latch.