| 摘要 |
PURPOSE:To reduce a bit error rate by controlling a clock frequency to be changed with a clock reproducing circuit constituting a phase locked loop circuit, at the time of demodulating digital data recorded on a magnetic recording medium. CONSTITUTION:Data recorded by 1st and 2nd recording modulation systems respectively in different recording density from each other on the magnetic recording medium 3 are picked up by the tilted data reproducing device, so as to obtain a reproducing clock signal CK10 from a clock component included in a pickup output SPB (DTPB) by means of the clock reproducing circuit 11 constituting the phase locked loop circuit, and the output SPB (DTPB) is demodulated based on the signal CK10. A control signal CNT corresponding to the 1st or 2nd recording modulation system is sent by a control circuit 15 to switch circuits 14 and 17. By this method, a reference signal frequency of the clock reproducing circuit 11 and a time constant of an LPF circuit 16 are changeably controlled, thus obtaining the signal CK10 consisting of an optimum phase, so that the bit error rate at the time of demodulating can be reduced. |
