| 摘要 |
PURPOSE:To improve the DMA transfer capacity with the DMA transfer fre quency cut down to the half within a device and to improve the processing efficiency of a processor, by transforming the DMA transfer into words within an internal bus. CONSTITUTION:An address byte count deciding part 16 deciding the byte count of the memory address of the transmission data, an address byte count comparing part 26 comparing the byte count of the reception data with that of the memory address are provided. The byte transfer is carried out only for the fraction data of the final address part after the word transfer where the byte count of the transfer data is allocated to the memory address. Thus the transfer is transformed into words within an internal bus so that the DMA transfer capacity is improved with the DMA transfer frequency cut down to the half within a device. Then the processing efficiency of a processor 1 is improved. |
