发明名称 Digital horizontal-deflection circuit
摘要 Instead of fine-controlling the horizontal deflection signal in a digital television receiver by means of two phase-locked loops and gate-delay stages as is done in prior art arrangements, in the horizontal-deflection circuit according to the invention, a first digital word delivered by a first phase-locked loop and representative of the horizontal frequency is added in an adder to a suitably amplified third digital word delivered by a phase comparator of a second phase-locked loop. The output of the adder is fed to the control input of a digital sine-wave generator which drives a frequency divider. The latter delivers the horizontal deflection signal, which drives the horizontal output stage. The phase comparator is fed with the horizontal flyback signal, which is derived from the horizontal deflection signal, and a second digital word generated by the first phase-locked loop and representative of the desired phase position of the flyback signal.
申请公布号 US4803407(A) 申请公布日期 1989.02.07
申请号 US19870074203 申请日期 1987.07.16
申请人 DEUTSCHE ITT INDUSTRIES GMBH 发明人 MEHRGARDT, SOENKE
分类号 H04N3/16;H03L7/06;H04N3/233;H04N5/12;(IPC1-7):H01J29/70;H01J29/72 主分类号 H04N3/16
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