发明名称 MANUFACTURE OF MASTER SLICE TYPE SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 <p>PURPOSE:To make it unnecessary to develope a master chip exclusively for each circuit scale, by singly or plurally combining a fundamental circuit region of a master wafer according to the circuit scale to be integrated to form and scribe an integrated circuit. CONSTITUTION:A plurality of first scribing lines 2 are set up so as to be able to form an integrated circuit corresponding to a master chip having a large scale on a semiconductor wafer 1 and the second scribing lines 3 are set up between these first scribing lines. Next, the fundamental circuit regions 4a-4d, wherein the fundamental cells necessary for constituting the circuit of the smallest scale and the electrode pads 5 are formed in the region of the smallest unit surrounded by the scribing lines 2 to form a master wafer. Further, according to the required circuit scale, the wiring or the like is given to the fundamental circuit regions 4a-4d singly or in a fixed number of combination of the fundamental circuit regions 4a-4d so as to form the integrated circuit having a fixed function. Then, scribing is performed every integrated circuit unit along the first and second scribing lines 2 and 3 for obtaining a chip of the integrated circuit according to the circuit scale.</p>
申请公布号 JPS63308344(A) 申请公布日期 1988.12.15
申请号 JP19870145621 申请日期 1987.06.10
申请人 NEC CORP 发明人 TAKAYAMA JUN
分类号 H01L21/301;H01L21/82;H01L21/822;H01L27/04;H01L27/118 主分类号 H01L21/301
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