摘要 |
<p>PURPOSE:To prevent the miswriting when runaway is generated in a soft and an incorrect memory address is specified by executing writing/reading in/from an EEPROM only when an output is generated from a time width signal generating means. CONSTITUTION:An I/O address from a CPU 1 is applied at timing (a) in consideration of execution time. The signal (a) is decoded by a decoder DE2, the decoded signal is applied to a chip select terminal of an one-shot multiplexer M1 and the multiplexer M1 generates an output (c) by a WR signal applied from the CPU 1 at the same timing. A gate circuit G1 finds out coincidence between the output signal from the multiplexer M1 and the WR signal from the CPU 1, and only when the output is generated from the multiplexer M1, the WR signal from the CPU 1 is applied to the WR terminal of the EEPROM 2. Even if a chip select signal E is applied in error, miswriting can be suppressed.</p> |