RESOLVER SPEED DETECTING DEVICE

摘要

PURPOSE:To stabilize an oscillation frequency and to improve detection accuracy by supplying a resolver and a PLL circuit with a frequency obtained by dividing a difference signal between count-up signals and count-stop signals of 1st and 2nd counters. CONSTITUTION:The oscillation frequency FA of a reference oscillator 11 is supplied as the count-up signal to 1st and 2nd counters 12 and 13. A 1st frequency divider 14 divides the oscillation frequency FA and supplies the frequency division output as the count-stop signal to the counter 12. The counter 12 divides the frequency obtained by subtracting the frequency FB of the count-stop signal from the frequency FA of the count-up signal and supplies the result as an excitation frequency of the resolver 15. The output frequency of the resolver 15 is supplied to a comparison part which constitutes a PLL circuit. Consequently, the oscillation frequency of a VCO 18 is determined by the count-stop signal and the frequency division ratio of a frequency divider 19.