BUFFER MEMORY MANAGEMENT EQUIPMENT

摘要

PURPOSE:To improve the utilizing efficiency of a buffer by providing a storage means for preceding and present read addresses, a comparison means for the both, an FIFO register storing the readout data, an address counter, a readout monitoring timer and a readout control section. CONSTITUTION:The management equipment is provided with a register 53 storing the address read precedingly by a CPU, a comparator 51 comparing the address read by the CPU at present with the address of the register 53, the FIFO 58 storing the readout data, an address counter 54 reading the data continuously, a readout watchdog timer 61 deleting the data in the FIFO 58 at readout at any time, a control section 59 reading the data to the buffer in a form of burst while the comparator 51 discriminates whether or not the FIFO 58 reads out the data, and a bus access contention section 41. Thus, the simultaneous processing is applied without stopping the readout operation till the write is finished regardless that the function of write/read is provided on the same bus. Through the use of the comparator, whether or not the data given to the FIFO is read is checked before the CPU reads the data normally.