发明名称 CONTROL METHOD FOR DETECTION OF MULTI-PROCESSOR ABNORMALITY
摘要 PURPOSE:To end an access with no addition of an unnecessary waiting cycle by releasing a waiting state when an access is given to a memory as long as no fault is detected. CONSTITUTION:A multi-processor contains a memory 5 which is shared by at least 2 central processing units CPU, e.g., CPU 1 and 2. When either one of both CPU 1 and 2 gives an access to the memory 5, a waiting state is applied to said CPU. When a memory abnormality detecting circuit 6 which checks the errors of the memory 5 detects no error, the waiting state is released. In such a way, a waiting state is immediately released when no fault occurs. Thus an unnecessary waiting cycle is avoided.
申请公布号 JPS63251842(A) 申请公布日期 1988.10.19
申请号 JP19870086333 申请日期 1987.04.08
申请人 SEIKO EPSON CORP 发明人 NAKAMURA JINICHI
分类号 G06F11/16;G06F15/16;G06F15/167 主分类号 G06F11/16
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