| 摘要 |
<p>A circuit for reducing noise wherein a video signal (SI) is divided into a first signal (SL) having low-frequency components and a second signal (SHI) having high-frequency components, the second signal (SHI) is further divided into a third signal (SH2) having an amplitude greater than a predetermined value and a fourth signal (SH3) having an amplitude smaller than a predetermined value, the fourth signal (SH3) is subjected to noise reduction through a delay circuit (12) to obtain a fifth signal (SH4), and the first signal (SI), the third signal (SH2) and the fifth signal (SH4) are combined. The circuit can be utilized for TV receivers and the like.</p> |
