发明名称 MULTIPLICATION DEVICE
摘要 PURPOSE:To increase input bit number via a simple circuit without losing high speed properties by deciding the absolute value of the input data and controlling the bit length of the input data applied to a multiplication device. CONSTITUTION:An input selector 2 consists of a gate means 21 which decides whether the input data is larger than 8 bit or not based on the absolute value of the input data and a gate means 22 which selects the n-th bit input or the (n+1)-th bit input among the input bits based on the deciding result of the means 21 and outputs it as the n-th bit output. Thus the selector 2 has a func tion to change the 8-bit input into the 7-bit one. While an output selector 3 has a function to convert the 16-bit result obtained by compressing the 8-bit data into the 7-bit one with calculation into an 18-bit output so as to obtain the same result as the data calculated in 8 bits.
申请公布号 JPS63208940(A) 申请公布日期 1988.08.30
申请号 JP19870043474 申请日期 1987.02.25
申请人 SHARP CORP 发明人 SHIBATA YOSHIKI;SHIRAISHI MASARU
分类号 G06F7/53;G06F7/52;G06F7/533 主分类号 G06F7/53
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