发明名称 METHOD OF TESTING IC MEMORIES
摘要 In a method of testing IC memories, at first, predetermined data such as all "0" or all "1" is written into an IC memory at a normal-operation power-supply voltage, and the written data is read out and confirmed. Next, the power-supply voltage is lowered and is then returned to the normal-operation power-supply voltage after a predetermined period of time has passed in order to determine whether the stored data is in agreement with the data as initially written. When the stored data is in agreement with the initially written data, the power-supply voltage is further lowered to repeat the above-mentioned procedure. The above-mentioned procedure is further repeated when the stored data is in agreement with the initially written data and a minimum data-holding limit voltage which is capable of holding the written data is thereby determined.
申请公布号 DE3278681(D1) 申请公布日期 1988.07.21
申请号 DE19823278681 申请日期 1982.09.24
申请人 FUJITSU LIMITED 发明人 OHE, YOSHIKAZU
分类号 G01R31/28;G11C29/00;G11C29/50;G11C29/56;(IPC1-7):G11C29/00 主分类号 G01R31/28
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