| 摘要 |
PURPOSE:To interrupt the leakage current enhanced by the fluctuation of threshold voltage of a reading-out transistor by a method wherein a memory cell of EPROM is composed of an independently exclusive writing-in transistor and a reading-out transistor as well as a control transistor connected to the reading-out transistor in series. CONSTITUTION:A part encircled by an element isolating oxide film 2 on the surface of a P type silicon substrate 1 is composed of a writing-in transistor T1 comprising an N<+> type source 3, an N<+> type drain 4, a floating gate 6a and a control gate 8a; a reading-out transistor T2 comprising the source 3, an N<+> type connecting region 5, the floating gate 7a and another control gate 8b; and a control transistor T3 comprising the connecting region 5, an N<+> type drain 6 and the other gate 8c. In such a constitution, the floating gates 7a, 7b, control gates 8a, 8b and the other gate 8c are respectively connected in common while the reading-out transistor T2 is connected to the control transistor T3 in series. Through these procedures, the leakage current flowing out when the threshold voltage in the enhancement state of the reading-out transistor T2 declines can be interrupted by the control transistor T3. |
