发明名称 MANUFACTURE OF BIPOLAR MOS INTEGRATED CIRCUIT
摘要 PURPOSE:To contrive improvement in controllability of the threshold voltage in a MOS transistor by a method wherein at least a part of the base region of a bipolar transistor and the well region, on which the MOS transistor will be formed, are formed in the same process by selectively introducing impurities. CONSTITUTION:The N<+> (or P<+>) type base region 6-2, which becomes a part of the base of a vertical type P-N-P (or N-P-N) transistor, and the N<+> (or P<+>) type well region 6-1 containing the source and drain region of a P (or N) channel MOS transistor are formed simultaneously from the surface of an N (or P) type epitaxial layer. As a result, the high frequency characteristics and the current characteristics of the emitter earth current amplification factor (hFE) of the vertical type P-N-P (or N-P-N) transistor can be improved, and the controllability of the threshold voltage in the P (or N) channel MOS transistor can also be improved.
申请公布号 JPS63175463(A) 申请公布日期 1988.07.19
申请号 JP19870007787 申请日期 1987.01.14
申请人 NEC CORP 发明人 NOGUCHI YASUO
分类号 H01L27/092;H01L21/331;H01L21/8238;H01L21/8249;H01L27/06;H01L29/73;H01L29/732 主分类号 H01L27/092
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