发明名称 DATA PROCESSOR
摘要 PURPOSE:To improve the processing speed of a macroinstruction and to drastically reduce a microinstruction step by providing an operand address calculation circuit and using one microinstruction so as to calculate the operand address and to access the operand. CONSTITUTION:The operand address of the microinstruction is calculated and the operand address is given to a processing means 1 and a main storage control means 2 by an operand address calculation circuit 4. The processing means 1 reads and decodes the macroinstruction from a main storage device 3 storing in advance a program comprising macroinstructions via the main storage controller 2. The operand address calculation circuit 4 calculates the operand address of the macroinstruction and the operand is outputted to the processing means 1 and the main storage control means 2. Thus, one microinstruction is used to calculate the operand address and to execute the access of the operand.
申请公布号 JPS63153637(A) 申请公布日期 1988.06.27
申请号 JP19860302102 申请日期 1986.12.17
申请人 FUJITSU LTD 发明人 YOSHITAKE AKIHIRO
分类号 G06F9/28;G06F9/22;G06F9/38 主分类号 G06F9/28
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