发明名称 LEVEL CONVERSION CIRCUIT
摘要 PURPOSE:To prevent the saturation of an output transistor (TR) by connecting a diode between a constant current path of a level shift stage and collectors of a phase inverting TR and the output stage TR. CONSTITUTION:In a conversion circuit comprising an ECL input stage CS, a level shift stage LS, and an output stage OP, the diode D1 is connected between a collector of the phase inverting TRQ6' and a node n4 of a constant current path where TRs Q12', Q14' of the shift stage LS and a resistor R21' are connected in series. Thus, when the TRQ6' is turned on, the potential of a node ns is decreased by the collector resistor and the TRQ6' approaches the saturation, a current flows from the node n4 to the node ns through a diode D1. Then the potential of the node n4 is decreased, the base potential is decreased and the saturation of the TRQ6' is prevented. The collector of an output TRQ9 of the output stage OP is connected to the other constant current path via diodes D2, D3 to prevent the saturation. As a result, the delay in the output is avoided without using a Schottky type TR and the leading is made steep to prevent the occurrence of the oscillation.
申请公布号 JPS63128814(A) 申请公布日期 1988.06.01
申请号 JP19860273991 申请日期 1986.11.19
申请人 HITACHI LTD 发明人 UEMATSU TSUYOSHI;HIKASA KAZUHIKO
分类号 H03K19/013;H03K19/018 主分类号 H03K19/013
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