发明名称 ON-CHIP MEMORY DEVICE
摘要 PURPOSE:To improve the performance of a system by providing an on-chip memory having a valid bit detecting circuit, and preserving a special instruction onto an on-chip memory system when an access is executed once concerning the special instruction necessary to a processor. CONSTITUTION:When a special instruction number 2 occurs at a processor main body, the body can be supported by an on-chip memory. In an address generating circuit 8, a second signal line 12 is shifted by one bit to the left by an output 50 of a circuit 34 with a first signal line 11 of a first register 4 as an input. The shifting number is 3 when the first register 4 is 00, it is 2 when it is 01, it is 1 when it is 10 and it is 0 when it is 11. By the output of circuits 38 and 36 with the output of a circuit 34 as an input, Nch transistors 40 and 42 are turned on or off, an on-chip memory access address (11 bits) 13 is generated by matching with low order 8 bits. A processor main body 2 stores the data from the external part into an on-chip memory and sets a valid bit 22.
申请公布号 JPS63123128(A) 申请公布日期 1988.05.26
申请号 JP19860269060 申请日期 1986.11.12
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 OKAMOTO OSAMU
分类号 G06F9/32;G06F12/00;G06F12/06 主分类号 G06F9/32
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