| 摘要 |
<p>PURPOSE:To decrease the noises produced when an access is given to a memory by having a slight difference between the rise and fall times of an access valid signal applied to each memory module when accesses are simultaneously given to plural memory modules. CONSTITUTION:The instructions stored in a CS 2-1 consisting of plural RAM modules 2 are read out by the addresses stored in an address register 3-1 and set to a register CSDR 3-3. The contents of the CSDR 3-3 are decoded by an instruction decoder 3-4 for control of the inside of a 1-chip processor 1. Then a module address comparator 3-31 compares the module addresses of the register 3-1 and an address +1 circuit 3-30 with each other. When the next access is given to the CS 2-1 with different RAM modules, a dummy FF 3-32 is set. Then the control is carried out so as to cause a slight difference between the rise and fall times of an access valid signal applied to each memory module.</p> |
