发明名称 PLL CIRCUIT FOR AFC
摘要 PURPOSE:To attain offset voltage adjusting operation given at once only by providing a voltage storage circuit storing a control voltage of a VCO, applying a stored voltage to a DC amplifier output so as to use it as a control voltage of the VCO. CONSTITUTION:In observing a meter 4, when an input frequency is close to the end of a lock-in range and a PLL circuit is locked, a write instruction is given to a memory 8. A control voltage of the VCO 5 is written in the memory 8 at that point of time and the control voltage is fed to the output of a DC amplifier 3. Thus, the PLL circuit is locked so that the output of the amplifier 3 is close to zero V and the center of the lock-in range is made coincident with the input frequency. Thus, the concidence of the center of the lock-in range of the PLL circuit with the input signal frequency is attained by using a write instruction to the memory 8 and remote control is also facilitated.
申请公布号 JPS63114311(A) 申请公布日期 1988.05.19
申请号 JP19860258239 申请日期 1986.10.31
申请人 HITACHI LTD 发明人 USHIJIMA HIDENORI
分类号 H03J7/02 主分类号 H03J7/02
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