| 摘要 |
PURPOSE:To obtain a sense amplifier that is highly sensitive and it not affected very much by the variability of processing and also ensure high integration of a DRAM and optimum reliability by having a drain region at an upper face of a protruding part of irregularities and a source region at a bottom face of a recessed part of the irregularities and installing a gate electrode at side walls of the protruding part through a gate insulating film. CONSTITUTION:An n<+>type layer 2 that develops into a common region of a MOS transistor, a p<->type layer 3 that forms a channel region, the n<+>type layer 4 that develops into a drain region and a bit line as well are formed at a p<->type Si substrate 1 in sequence. The n<+>type and p<->type layers 4 and 3 are pattern- formed to remain in the forms of stripes and such periodical irregularities as the n<+> layer 2 can be exposed at a recessed part 5 are formed and then a gate electrode 7 is formed on side walls of a protruding part through a gate insulating film 6. Spaces between the n<+>type layers 41 and 43 as well as 42 and 44 that develop into bit line regions of adjacent sense amplifiers are separated by insulating films 10 and the p<+>type layers 8. Interconnections 9 carry out cross connections between gate and drain of two MOS transistors. |
