| 摘要 |
<p>In a data processing system (10) comprising a central processing unit (CPU) (12), a memory management unit (MMU) (16) and a storage system (14), the MMU (16) translates each of the logical addresses output by CPU (12) to a corresponding physical address in the storage system (14). In the MMU (16), a comparator (32) determines if each logical address is within an address range defined by an address range descriptor stored in a transparent translation register (TTR) (30). If a logical address is found to be within that address range, the MMU (16) is forced to provide that logical address as the corresponding physical address without translation. Selected control signals may be conditionally provided in the event of such a ''transparent'' translation.</p> |
