发明名称 HISTORY MEMORY CONTROL SYSTEM
摘要 PURPOSE:To simulate operation right before trouble occurrence by adding a means which reads and writes data in and out of the history memory of a history memory device and thus providing the function of a test signal device. CONSTITUTION:A mode signal TM is inputted to respective gate circuits G1, which enter a test signal device state. When a data set signal, for example, is inputted in the test signal state, a test data write significance latch 16 and a write significance signal is sent to the history memory 2. Then test data which is sent out of a service processor to a test data write register 11 is stored in the history memory 2 according to addresses indicated by an address counter 4. The stored test data is read out to a read register 13 with the instruction of the service processor and sent out to a necessary input terminal through a test signal control circuit 14 to become test data as simulation data.
申请公布号 JPS6356739(A) 申请公布日期 1988.03.11
申请号 JP19860202574 申请日期 1986.08.27
申请人 FUJITSU LTD 发明人 TAKAHASHI MASANORI
分类号 G06F11/34;G06F11/22 主分类号 G06F11/34
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