| 摘要 |
PURPOSE:To weaken the parasitic MOS effect by mitigating the field concentration on the sides of semiconductor films by a method wherein sidewalls composed of insulator are provided on the sides of true semiconductor films composing high resistant resistors while the sides of said semiconductor films are inclined. CONSTITUTION:Interconnection layers 13 comprising n<+> type polycrystalline Si film and high resistant polycrystalline Si resistors R1, R2 comprising true polycrystalline Si films connected to the interconnection layers 13 are provided on an MOSFET through the intermediary of an interlayer insulating film 12. Sidewalls 15 composed of insulator such as SiO2 are provided on the sides of said high resistant polycrystalline Si resistors R1, R2 and interconnection layer 13. Through these procedures, the distance between bit lines BL and the sides of said resistors R1, R2 is extended by the thickness of sidewalls 15. Resultantly, the electric fields generated on the sides of resistors R1, R2 can be attenuated by the bit lines BL so that parasitic MOS effect given by the bit lines BL, another interlayer insulating film 16 and the resistors R1, R2 may be weakened. |
