| 摘要 |
PURPOSE:To eliminate the use of a subtracter by providing a writing counter and a reading counter separately for controlling memory address. CONSTITUTION:The data output of a memory 9 is connected to a digitalanalog converter 10 and the address section of the memory 9 is connected to a multiplexer (MPX) 11. The output of a write counter 12 is connected to the MPX 11, and the output of a read counter 13 is connected to another input. The clock of sampling period TS is given to the write counter 12 and read counter 13 as a clock. By operating the write counter 12 and read counter 13 by the same clock 0 and giving them to the memory 9 after switching by the MPX 11, the difference between the output (m) of the write counter 12 and the output (n) of the read counter 13 becomes a delay time for the memory 9, and accordingly, delaying operation is performed. |
