| 摘要 |
A digital system comprising a synchronous fastbus for interconnecting a cluster of devices such as processors and for interconnecting a plurality of said clusters. Information is transferred over the synchronous fastbus using a parallel digital word information packet. All required bus control signals including acknowledge and non-acknowledge signals take place within the same packet transfer fastbus cycle time. A command information packet is transferred over the fastbus separately from a response information packet thereby leaving the fastbus free until a response packet is returned to the requestor. During the interim other devices are allowed to access the fastbus, thereby increasing significantly fastbus utilization.
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