发明名称 TRANSMISSION EQUIPMENT FOR DIGITAL SIGNAL
摘要 PURPOSE:To eliminate the need for a bit synchronizing circuit at decoding by keeping a synchronizing pattern inserted as a fixed pattern before conversion into a specific fixed pattern even after the conversion in sending, e.g. an NRZ data while being converted into a convolutional code such as an M<2> code. CONSTITUTION:A pattern after conversion from an encoder 10 is fed to a detection circuit 13 during a redundancy bit addition space period, a pattern just before redundancy bit addition space, that is, a pattern after the final data conversion of block data are detected, and the redundancy bit bringing the synchronizing pattern after conversion into the fixed pattern is generated based on the detection pattern and the result is added to an addition space of the redundancy bit in the redundancy bit addition circuit 12. In this case, the code after code conversion is initialized by the redundancy bit. Thus, the synchronizing pattern is converted into a prescribed fixed pattern without fail by said redundancy bit in the encoder 10.
申请公布号 JPS62291757(A) 申请公布日期 1987.12.18
申请号 JP19860135350 申请日期 1986.06.11
申请人 SONY CORP 发明人 SUDA MOTOHARU
分类号 H04L7/08;G11B20/10;G11B20/12;H03M5/14;H04L7/00;H04L25/49 主分类号 H04L7/08
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