发明名称 OUTPUT BUFFER CIRCUIT
摘要 PURPOSE:To improve the electrostatic strength by arranging a MOS transistor (TR) connected to an output terminal in parallel with an output buffer MOS TR. CONSTITUTION:A PMOS TR 3 and an NMOS TR 4 whose gates are connected to an input terminal 6 respectively, and used as the output buffer MOS TRs are provided to an output buffer circuit, the source of the PMOS TR 3 is brought into a power supply level VDD, while the source of the NMOS TR 4 is brought into a ground level. A dummy PMOS TR 1 acting like a protection diode is arranged in parallel with the PMOS TR 3 and a dummy MOS TR 2 acting like a protection diode is arranged in parallel with the NMOS TR 4. Thus, an excellent breakdown characteristic is obtained without sacrifycing the channel width W and the channel L.
申请公布号 JPS62285516(A) 申请公布日期 1987.12.11
申请号 JP19860128586 申请日期 1986.06.03
申请人 SONY CORP 发明人 WATANABE KAZUO
分类号 H03K17/08;H01L21/822;H01L27/04;H03K17/687;H03K19/003 主分类号 H03K17/08
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