| 摘要 |
PURPOSE:To facilitate debugging for program development by using he address value on an address bus as data for program debugging when an interrupt signal is generated by a control means. CONSTITUTION:If a CPU 11 or the like gets the use right of a bus to access a memory device 12 when bug exists in a program, the address on an internal address bus 22 has a value in the range between addresses held in registers 23 and 36. At this time, the output of an AND circuit 41 is made active and is sent to a control circuit 34 through a memory access signal line 42. The control circuit 34 discriminates that data write to the memory device 12 occurs because the signal line 42 is made active, and the control circuit 34 generates an interrupt request to the CPU 11 through an interrupt signal line 52. The control circuit 34 makes an address holding instruction signal line 31 active and holds the address value on the internal address bus 22 in an address value holding register 30.
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