| 摘要 |
<p>In a dynamic random access memory with a folded bit line structure, in which a memory cell array is divided into a plurality of blocks (CAL1, CAL2) and the bit lines (BL1, @@@, BL2, @@@) of the adjacent blocks (CAL1, CAL2) are connected to each other by using transfer gate transistors (QT1, QT2), sense amplifiers (SA1, SA2) and restore circuits (RE1, RE2) for detecting potential difference between pair of bit lines are provided for each of the pairs of bit lines (BL1, @@@, BL2, @@@) of each of the blocks (CAL1, CAL2), the transfer gate transistors (QT1, QT2) to turned on by being triggered by an activating signal to a restore circuit first operated, out of restore circuits connected to bit lines connected to the transfer gate transistor (QT1, QT2).</p> |
