发明名称 MANUFACTURE OF SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PURPOSE:To obtain a compact, highly reliable MOS memory, by forming an N-type diffused layer on the entire surface of the active region of a cell part, and thereafter introducing P-type impurities in the active region other than a capacitor part by a self-aligning method. CONSTITUTION:On a P-type Si substrate 101, a field oxide film 102 and a capacitor gate oxide film 103 are provided. B and As ions are introduced in a cell active part, and a (p) layer 105 is formed. An (n) layer 104 is formed at the inside of the layer 105. Then a P added poly Si electrode 106 is formed. By using a mask, B ions are implanted. A (p) layer 107 is formed in the cell active region other than a capacitor part by a self-aligning method. Thereafter, a gate oxide film 108 and a P added poly Si cell transistor electrode 109 are formed. By using the mask, As ions are implanted, and a source and drain part 110 is formed. The surface is covered with PSG 111. A window is provided and an Al wiring 112 is attached. Thus the device is completed. In this constitution, a photoetching method can be omitted by one time, and aligning allowance is not required. Therefore, a compact highly reliable memory is obtained.
申请公布号 JPS62199054(A) 申请公布日期 1987.09.02
申请号 JP19860042104 申请日期 1986.02.26
申请人 NEC CORP 发明人 KUDO OSAMU
分类号 H01L27/10;G11C11/403;H01L21/8242;H01L27/108 主分类号 H01L27/10
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