| 摘要 |
PURPOSE:To facilitate the error detection and diagnosis by a processing unit itself by detecting an error when a difference with a reference clock is 10% or over, informing it to the processing unit so as to eliminate the malfunction of control operation such as a microprocessor or a data transfer. CONSTITUTION:A reference clock 1 is given to an AND circuit 6 to set a reference counter 3 and when the reference counter 3 reaches the preset 1st count, a NAND circuit 8 gives an output and the AND circuit 6 stops the count of the reference counter 3. On the other hand, an operating clock 2 sets the operation counter 4 through an AND circuit 7 and when the operation counter 4 reaches the preset 2nd count, a NAND circuit 9 gives an output and the AND circuit 7 stops the count of the operation counter 4. When the 3rd counter 5 outputs the 3rd count four, it is used as an input of a NAND circuit 11. For example, the 1st and 2nd counts are set to 40 and the 3rd count is set to four, and when the operating clock 2 varies by 10% or over to the reference clock 1, the circuit is operated to set an error register 14.
|
